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A Logic Test Chip for Optimal Test and Diagnosis

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개인저자Niewenhuis, Benjamin T.
단체저자명Carnegie Mellon University. Electrical and Computer Engineering.
서명/저자사항A Logic Test Chip for Optimal Test and Diagnosis.
발행사항[S.l.] : Carnegie Mellon University., 2018
발행사항Ann Arbor : ProQuest Dissertations & Theses, 2018
형태사항127 p.
소장본 주기School code: 0041.
ISBN9780355971514
일반주기 Source: Dissertation Abstracts International, Volume: 79-09(E), Section: B.
Adviser: Ronald Blanton.
이용제한사항This item is not available from ProQuest Dissertations & Theses.
요약The benefits of the continued progress in integrated circuit manufacturing have been numerous, most notably in the explosion of computing power in devices ranging from cell phones to cars. Key to this success has been strategies to identify, man
요약To help address these challenges, a new logic test chip, called the Carnegie Mellon Logic Characterization Vehicle (CM-LCV), has been developed. The CM-LCV utilizes a two- dimensional array of functional unit blocks (FUBs) that each implement an
요약In addition to the design of the CM-LCV, methods for testing it are presented. Techniques to create minimal sets of test patterns that exhaustively exercise each FUB within the FUB array are developed. Additional constraints are described for th
요약A hierarchical FUB array diagnosis methodology (HFAD) is also presented for the CM-LCV that leverages its unique properties to improve performance for multiple defects. Experiments demonstrate that this HFAD methodology is capable of perfect acc
요약The contributions of this dissertation can thus be summarized as the description of the design, test, and diagnosis of a new logic test chip for use in yield learning during process development. This CM-LCV can be adapted to meet a wide range of
일반주제명Electrical engineering.
언어영어
기본자료 저록Dissertation Abstracts International79-09B(E).
Dissertation Abstract International
대출바로가기http://www.riss.kr/pdu/ddodLink.do?id=T14998477

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