| LDR | | 02831nmm uu200433 4500 |
| 001 | | 000000334573 |
| 005 | | 20240805180558 |
| 008 | | 181129s2017 |||||||||||||||||c||eng d |
| 020 | |
▼a 9780438030695 |
| 035 | |
▼a (MiAaPQ)AAI10273823 |
| 035 | |
▼a (MiAaPQ)umn:18019 |
| 040 | |
▼a MiAaPQ
▼c MiAaPQ
▼d 248032 |
| 082 | 0 |
▼a 621.3 |
| 100 | 1 |
▼a Sengupta, Deepashree. |
| 245 | 12 |
▼a A Study on Unintentional and Intentional Sources of Variability in Nanometer Scale Digital Circuits. |
| 260 | |
▼a [S.l.] :
▼b University of Minnesota.,
▼c 2017 |
| 260 | 1 |
▼a Ann Arbor :
▼b ProQuest Dissertations & Theses,
▼c 2017 |
| 300 | |
▼a 147 p. |
| 500 | |
▼a Source: Dissertation Abstracts International, Volume: 79-10(E), Section: B. |
| 500 | |
▼a Adviser: Sachin S. Sapatnekar. |
| 502 | 1 |
▼a Thesis (Ph.D.)--University of Minnesota, 2017. |
| 520 | |
▼a As technology has scaled aggressively over the past 50 years, device reliability issues and escalated power dissipation have become growing concerns in digital very large scale integrated (VLSI) circuits. Today's integrated circuits, which imple |
| 520 | |
▼a Unintentional reliability failures due to circuit aging pose serious threat for safety-critical and security applications, and must be mitigated. Intentional errors, on the other hand, can be introduced to a limited extent in circuits pertaining |
| 520 | |
▼a Temporal variations are injected into circuits due to aging during the normal operation of a chip. The predominant aging effects that cause circuit delay shifts over time are bias temperature instability (BTI) and hot carrier injection (HCI), bo |
| 520 | |
▼a On the other hand, numerous applications related to recognition, mining, and synthesis, especially those from image and audio processing domains, are error tolerant, since they pertain to the inherently limited human perception. A new design par |
| 520 | |
▼a For applications where aging-related errors are a critical problem, the first half of the thesis proposes efficient aging sensor schemes that enable system adaptation for error-free operation. On-chip ring-oscillator-based (ROSC-based) structure |
| 520 | |
▼a For error-tolerant applications, the second half of the thesis proposes algorithms for error analysis, and design of approximate circuits. The proposed analysis algorithms generate the distribution of the error injected into a computation when i |
| 590 | |
▼a School code: 0130. |
| 650 | 4 |
▼a Electrical engineering. |
| 690 | |
▼a 0544 |
| 710 | 20 |
▼a University of Minnesota.
▼b Electrical Engineering. |
| 773 | 0 |
▼t Dissertation Abstracts International
▼g 79-10B(E). |
| 773 | |
▼t Dissertation Abstract International |
| 790 | |
▼a 0130 |
| 791 | |
▼a Ph.D. |
| 792 | |
▼a 2017 |
| 793 | |
▼a English |
| 856 | 40 |
▼u http://www.riss.kr/pdu/ddodLink.do?id=T14996567
▼n KERIS |
| 980 | |
▼a 201812
▼f 2019 |
| 990 | |
▼a 관리자 |