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020 ▼a 9780438047402
035 ▼a (MiAaPQ)AAI10808915
035 ▼a (MiAaPQ)princeton:12487
040 ▼a MiAaPQ ▼c MiAaPQ ▼d 248032
0820 ▼a 621.3
1001 ▼a Liu, Feng.
24510 ▼a Static and Dynamic Instruction Mapping for Spatial Architectures.
260 ▼a [S.l.] : ▼b Princeton University., ▼c 2018
260 1 ▼a Ann Arbor : ▼b ProQuest Dissertations & Theses, ▼c 2018
300 ▼a 120 p.
500 ▼a Source: Dissertation Abstracts International, Volume: 79-10(E), Section: B.
500 ▼a Adviser: David August.
5021 ▼a Thesis (Ph.D.)--Princeton University, 2018.
520 ▼a In response to the technology scaling trends, spatial architectures have emerged as a new style of processors for executing programs more efficiently. Unlike traditional Out-of-Order (OoO) processors, which time-share a small set of functional u
520 ▼a Currently, spatial architectures mainly use static methods to map instructions onto the arrays of functional units. The existing methods have several limitations: First, for programs with irregular memory accesses and control flows, they yield p
520 ▼a To address these issues and improve the applicability of spatial architectures, this dissertation proposes two techniques. The first, Coarse-Grained Pipelined Accelerators (CGPA), is a static compiling framework that exploits the hidden parallel
520 ▼a The second technique, Dynamic Spatial Architecture Mapping (DYNASPAM), reuses the speculation system in the OoO processors to dynamically produce high-performance scheduling and execution on a dedicated spatial fabric. The proposed technique is
590 ▼a School code: 0181.
650 4 ▼a Computer engineering.
650 4 ▼a Computer science.
690 ▼a 0464
690 ▼a 0984
71020 ▼a Princeton University. ▼b Electrical Engineering.
7730 ▼t Dissertation Abstracts International ▼g 79-10B(E).
773 ▼t Dissertation Abstract International
790 ▼a 0181
791 ▼a Ph.D.
792 ▼a 2018
793 ▼a English
85640 ▼u http://www.riss.kr/pdu/ddodLink.do?id=T14997846 ▼n KERIS
980 ▼a 201812 ▼f 2019
990 ▼a 관리자