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020 ▼a 9780438048522
035 ▼a (MiAaPQ)AAI10822487
035 ▼a (MiAaPQ)princeton:12558
040 ▼a MiAaPQ ▼c MiAaPQ ▼d 248032
0820 ▼a 621.3
1001 ▼a Ham, Tae Jun.
24510 ▼a Data Access Optimization in Accelerator-oriented Heterogeneous Architecture through Decoupling and Memory Hierarchy Specialization.
260 ▼a [S.l.] : ▼b Princeton University., ▼c 2018
260 1 ▼a Ann Arbor : ▼b ProQuest Dissertations & Theses, ▼c 2018
300 ▼a 161 p.
500 ▼a Source: Dissertation Abstracts International, Volume: 79-10(E), Section: B.
500 ▼a Advisers: Margaret R. Martonosi
5021 ▼a Thesis (Ph.D.)--Princeton University, 2018.
520 ▼a For the past fifty years, Moore's Law and Dennard Scaling have been playing important roles in both performance and energy efficiency of computer systems. Unfortunately, they are not likely to continue, and computers no longer benefit from techn
520 ▼a To address this limitation, this thesis presents hardware and software techniques which can be utilized to design a system that can effectively accelerate data-intensive workloads. Specifically, this thesis addresses the two most important aspec
520 ▼a In summary, this thesis investigates the memory wall challenge in the era of specialization and presents data access optimizations which enables data-intensive workloads to benefit from specialized, heterogeneous systems without being limited by
590 ▼a School code: 0181.
650 4 ▼a Computer engineering.
650 4 ▼a Computer science.
650 4 ▼a Electrical engineering.
690 ▼a 0464
690 ▼a 0984
690 ▼a 0544
71020 ▼a Princeton University. ▼b Electrical Engineering.
7730 ▼t Dissertation Abstracts International ▼g 79-10B(E).
773 ▼t Dissertation Abstract International
790 ▼a 0181
791 ▼a Ph.D.
792 ▼a 2018
793 ▼a English
85640 ▼u http://www.riss.kr/pdu/ddodLink.do?id=T14998478 ▼n KERIS
980 ▼a 201812 ▼f 2019
990 ▼a 관리자